Synopsys Expert Delivers Lecture on Code Coverage in VLSI Design at MGIT

News Date : 27 Oct 2026     News Report

IIPC and ECE Department give V Semester students an industry view of functional verification in modern chip design

Hyderabad, 27th October 2026: The Industry-Institute Partnership Cell (IIPC) of Mahatma Gandhi Institute of Technology (MGIT), in collaboration with the Department of Electronics and Communication Engineering (ECE), organized an expert lecture on “Code Coverage in VLSI Design” for V Semester ECE students.

The session was delivered by Mr. J. Bala Krishna, Senior Applications Engineer, Synopsys, Hyderabad, a global leader in electronic design automation (EDA) and semiconductor design solutions.

In his lecture, Mr. Bala Krishna introduced students to the concept of code coverage and its role in verifying that a hardware design behaves as intended. He explained how coverage metrics help verification engineers measure how thoroughly a design has been tested, and how they fit into the larger functional verification process. He also discussed the verification methodologies used in industry today and how they help catch design errors before a chip goes into fabrication.

The speaker highlighted that verification accounts for a significant share of the effort in modern chip development, making it one of the most in-demand skill areas in the semiconductor industry.

The session gave students practical, industry-oriented knowledge that complements their academic coursework and prepares them for careers in semiconductor design and verification.

The Department of ECE and IIPC thanked Mr. J. Bala Krishna for sharing his expertise and insights with the students.